1. Field of the Invention
This invention relates to data processing systems. More particularly this invention relates to data processing systems supporting nested interrupts and the control of pre-emption and interrupt ordering within such systems.
2. Description of the Prior Art
It is known to provide data processing systems with interrupt handling mechanisms. Typically, when an interrupt signal arises, this triggers the data processing system to change the program flow to start executing an interrupt handling program for dealing with the situation signalled by the interrupt signal. This type of data processing system is well-suited for use in embedded and deeply embedded data processing systems, particularly where real time or near real time operation is desired. Within interrupt driven data processing systems, it is highly desirable to be able to deal with more than one interrupt at a time. In many systems the interrupt latency, or more importantly the time from an interrupt occurring until the code for dealing with that interrupt starts to execute, is a critical performance limiting parameter. The ability to nest interrupts allows a newly arising interrupt with a suitably high priority to pre-empt an existing interrupt handling program of a lower priority.
A problem which can arise within such nested interrupt handling systems is that when a sequence of interrupt events occur which respectively pre-empt one another, a disadvantageous amount of time can be consumed in switching between the associated interrupt handling programs concerned. Measures which can improve the processing efficiency of interrupt driven data processing systems are strongly advantageous.